coprocessor

coprocessor

1. 1 performed an invalid arithmetic operation.|%1 attempted to use a nonexistent math coprocessor .

1执行了非法运算。%1试图使用并不存在的数学协处理器。

2. 1 performed an invalid memory access.|%1 instructed the math coprocessor to access invalid memory.

1非法访问内存。|%1指示数学协处理器访问无效的内存。

3. A Video Image Convolution coprocessor based on SIMD architecture.

3、基于SIMD结构的可重构图像卷积器。

4. !--The 8087 was the first math coprocessor designed by Intel and it was built to be paired with the Intel 8088 and 8086 microprocessors.

8087 是由 Intel 所设计的第一个数学 辅助处理器，并且它是建造来与 Intel 8088 和 8086 微处理器成对工作。

5. 8087 math coprocessor

8087协处理器

6. Runs under DOS on a 286 with 287 math coprocessor and VGA display minimum.

DOS下运行的286与287数学协处理器和VGA显示最低。

7. Intel 80486DX, Pentium and later processors include a built-in coprocessor on the CPU core.

Intel 80486DX，Pentium 和之后的处理器都在CPU核心含有内建的辅助处理器。

8. java coprocessor

Java协处理器

9. cryptographic coprocessor

n. 密码辅助处理器

10. RSA coprocessor

RSA协处理器

11. Implementation for RSA Cryptography Coprocessor

RSA密码协处理器的实现

12. SIMD coprocessor

SIMD协处理器

13. THE CODE OPTIMIZING TECHNIQUES OF COMMON LISP COMPILER IN PLC COPROCESSOR SYSTEM BASED ON SUN3/4 WORKSTATIONS

Sun 3/4专用协处理器PLC系统中Common Lisp编译器的代码优化措施

14. grphics coprocessor

[计] 图形协处理器

15. An approach to the design of microprogram controller for coprocessor

一种协处理器微程序控制器的设计

16. But what if the market-based arguments against AMD's coprocessor plans were nullified?

但如果市场派反对AMD的协处理器计划的观点立不住脚，那会怎么样？

17. Keyword: FPGA, PCI, Logic Analyzer, Cipher Coprocessor, Experimental system.

关键词：FPGA;PCI;逻辑分析仪;密码协处理器;实验系统

18. The computer uses a self-made 32 bit FPU as its host processor and a self-made MPP as its image processing coprocessor.

其宿主机为自行研制的32位浮点RISC芯片,图象协处理系统为自行研制的MPP协处理器。

19. match coprocessor

匹配协处理器

20. coprocessor chip

协同处理器芯片

21. Embedded coprocessor

协处理器

22. Coprocessor architecture

协处理器结构

23. coprocessor register

协处理机寄存器

24. coprocessor interface

协处理机接口

25. coprocessor mechanism

协处理机机构

26. coprocessor detected

协处理机检出

27. In addition, most adapters have their own graphics coprocessor for performing graphics calculations.

另外，许多适配器还有了自己的图形协处理器，用以执行图形计算。

28. It can properly satisfy the needs of practice of IC design, embed operating system as well as Logic Analyzer and Cipher Coprocessor.

可作为逻辑分析仪、密码协处理器使用，也可用于信息安全、IC设计、嵌入式操作系统等有关的研究、开发和实验。

29. Scalable VLSI Design and Implementation for Asymmetric Keys Cryptosystems Coprocessor

可扩展公钥密码协处理器的设计与实现

30. reconfigurable coprocessor

可重构协处理器

31. vector coprocessor

向量协处理机

32. graphics coprocessor

图形协处理器

33. A graphics coprocessor chip enhances the performance of programs with lots of graphics and helps create complex screen displays.

图形协处理器芯片用许多的图表来提高程序的表现力，并且帮忙创造复杂的屏幕显示。

34. The executing of the microcode function of the microprogram controller is very crucial to the instructions decoder in the coprocessor.

在协处理器中,微程序控制器的微码控制是协处理器指令译码的控制核心。

35. These three algorithms accelerate the speed of RSA execution.In hardware level, it proposed three methods to optimize the Montgomery multiplier and three methods to implement the RSA coprocessor.

在硬件结构层次上，本文在研究经典型高基可扩展Montgomery模乘器基础上提出了三种Montgomery模乘器的改进方案，同时还提出了三种RSA协处理器的实现方案；

36. In this mode, the full security features of the 4758 Coprocessor are available.

在这种模式下,4758 Coprocessor的完整安全特性是可用的。

37. The Design of an ECC Coprocessor over GF (2~n)

基于GF(2~n)的ECC协处理器芯片设计

38. Problems with the external mathematical coprocessor (applies only to old 80386 microprocessors).

外部算术处理器的问题（仅用在老的80386）。

39. multiple coprocessor

多协同处理器

40. The multimedia coprocessor consists of several modules to accelerate the processing of multimedia data.

多媒体协处理器中包含了多个专用于多媒体处理的功能模块，可以加速多媒体处理的进行。

41. It presents a good alternative to Windows or DOS for applications without real-time requirements or for those with real-time requirements that are met with dedicated hardware or a coprocessor.

它在视窗或者DOS之外，为那些没有实时要求的应用或者虽有实时要求但可以采用专用硬件或协处理器的应用提供了一个好好的替代选择。

42. secure coprocessor

安全协处理器

43. Wide-Area Network Interface Coprocessor

宽域网接口协处理器

44. THE COMBINATIVE IMPLEMENTATION OF DIVISION AND SQUARE ROOT IN AN EMBEDDED COPROCESSOR

嵌入式协处理器中除法和平方根计算的整合设计

45. Design of Synchronization Between Embedded Microprocessor and Coprocessor

嵌入式微处理器与协处理器同步的设计

46. The Design of Parallel Video Motion Estimation Coprocessor

并行视频运动估计协处理器设计

47. When the processor is being used to control I/O and move the data，there is a loss of processor efficiency.[8] Thus the idea naturally arises to use a second processor or coprocessor for I/O.

当处理器用于控制I/O和传送数据时，其效率下降。因而自然会想到用第二个处理器或协处理器去处理I/O。

48. We describe how SBATCH splits statements and produces schedule to execute on the host processor and the coprocessor simultaneously.The experimental results of this approach are also discussed.

我们将描述SBATCH系统如何切割陈述以及产生执行计画，并能充分发挥主处理器与协同处理器之效能，亦会讨论其实验结果。

49. This dissertation puts forward the implementation of one kind of FPU named LSC87, which is fully compatible with the Intel 8087 math coprocessor.

所以，进行自主知识产权的浮点处理器芯片的研制非常有必要。本课题的目标是研制出与INTEL8087完全兼容的航天专用的浮点协处理器（LSC87）芯片；

50. Extended Math Coprocessor

扩展型数字协处理器

51. An attack-resisted RSA coprocessor integrating multiplication and inverse is presented in this paper.

提出了一种集成模乘求逆双重运算的抗攻击RSA协处理器设计。

52. The concept and design principle of reconfigurable cipher coprocessor are proposed in this paper.

提出了可重构密码协处理器的概念并论述了其设计原理。

53. The compiler-supplied floating-point library contains a set of software subroutines that emulate the instruction set of a floating-point coprocessor.

支持浮点运算的编译器中的程序库包含一组子程序来模拟浮点运算协处理器中的指令组。

54. numeric coprocessor

数值协处理器

55. A Design of Microprogram in the Math Coprocessor

数值协处理器中微程序设计

56. A math coprocessor chip helps programs using lots of mathematical equations to run faster .

数学协处理器芯片帮助程序使用许多数学等式，（使程序）快速运行。

57. With the RAM-like external interface, the coprocessor can be easily interfaced to the AHB on-chip bus of LEON2.The basic way to control the coprocessor with the SPARC V8 instructions is described at the end of the paper.

文中还介绍了使用SPARC V8指令(LEON2嵌入式32位RISC处理器所采用的指令体系)控制协处理器与嵌入式主处理器协同工作的基本方法。

58. A new address generator of the embeded SIMD coprocessor is introduced in this paper.

文章介绍了一种新的嵌入式SIMD协处理器地址产生器。

59. The paper discusses the design of a Coprocessor based on the ECC(Elliptic Curve Cryptosystem)defined over GF(2 n ),a finite(Galois)Field.

文章讨论了定义在GaloisField(GF)2有限域上椭圆曲线密码体制(ECC)协处理器芯片的设计。

60. the promoter of community commonweal and community civilization; the coprocessor of community resource; and the coordinator in community relationships.

新的分类结果可将社区自组织的角色功能界定为社区发展的主人翁、社区自治的主力军、社区公益和社区文明的倡导者、社区资源的整合器以及社区关系的协调者等。

61. J.R.Hauser and J.Wawrzynek, GARP: A MIPS processor with a reconfigurable coprocessor, Proc.IEEE Workshop FPGAs Custom Comput.Machines, Apr. 1997.

曲英杰，可重构密码协处理器的概念及其设计原理，计算机工程与应用，2003年12月。

62. At last, a new technique that PLD as a coprocessor works together with DSP chip in the complex data processing of intelligent fuze is put forward.

最后,提出了在人工智能引信复杂数据处理任务中PLD作为协处理器与DSP处理器结合使用的新的技术途径。

63. analogy coprocessor

模拟协处理器

64. Now it is reported that the solution D -Wave is the traditional server, in whom quantum chip is used as coprocessor, capable of accelerating a number of calculations.

现在据报道，该解决方案d波是传统的服务器，在其中的量子芯片，是用来作为协处理器，能够加速了一些计算。

65. PLC-programmable coprocessor module used to perform the function of an event recorder

用PLC的可编程模件实现事件记录的功能

66. AES coprocessor implementation for wireless sensor network

用于无线传感器网络的AES协处理器设计

67. disk coprocessor

磁盘协同处理器

68. disk coprocessor board

磁盘协处理器板

69. A Run Time Reconfigurable Coprocessor Research in Data Processing System of Space Solar Telescope

空间太阳望远镜星载数据处理系统中的动态可重构协处理器研究

70. math coprocessor

算术协同处理器

71. Implementation of an Analogical Reasoning Coprocessor

类比推理协处理器的实现

72. System Control Coprocessor

系统控制协处理器

73. network coprocessor

网络协调控制器

74. Design and Implementation of the Coprocessor in Network Processors

网络处理器中协处理器设计方法研究及实现

75. networking coprocessor

联网协处理器

76. A high-speed optical correlator being developed by the Naval Research Laboratory (NRL) will act as a coprocessor to an Intel Paragon XP/S-25 computer.

被海军研究实验室 (NRL) 发展的一个高速的光学相关器将会担任对英代尔样板来说的一个共处理器 XP/S-25 计算机。

77. The system is composed of Digital Signal Pro-cessor (DSP) and Field Programmable Gate Array (FPGA), one FPGA as coprocessor can implement different functions due to its re-configurable characteristic.

该系统采用DSP+FPGA的框架结构，利用FPGA的可重构特性将其中一片FPGA作为协处理器可以实现不同的图像处理功能。

78. The system uses PXA255 processor with DSP coprocessor as a micro controller.The composition and the principle of the system are introduced.

该系统采用带有DSP协处理器的PXA255微处理器作为微控制器单元，介绍了它的组成及原理。

79. speech coprocessor

语音协处理器

80. Design of a motion estimation coprocessor

运动估计协处理器的设计