ddr
ddr
1. ddr sdram
(double date rate双数据率sdram)
2. DDR SDRAM design and debugging experience.
(译)：DDR SDRAM内存的设计和调试经验。
3. ddr sdram controller datd module source code integrity of the source code has been tested.
(译)：DDR SDRAM控制器模块的源代码datd完整的源代码已经过测试。
4. DDR and DDR DIMM Controller complete source code can be used directly.
(译)：复员和DDR内存控制器的完整的源代码可以直接使用。
5. Die DDR lebt weiter -- auf 79 qm!
/ 再见列宁 / 民主德国在79平方米房...
6. 26.Was ereignete sich am 17.Juni 1953 in der DDR?
1953年6月17日在民主德国发生了什么事？
7. From 1985 to 1990, he was sent to work in the DDR.
1985年至1990年他被派往民主德国工作。
8. An Investigation of the Epitaxial Material for 3 mm Waveband Si DDR IMPATT Diodes
3mm波段硅双漂移崩越二极管外延材料研制
9. THE EXPERIMENTAL INVESTIGATION OF Si 8 mm DDR IMPATT DEVICES
8毫米硅DDR IMPATT器件的实验研究
10. The comparison of CR and DDR system
CR与DDR的比较
11. DDR FCRAM Boosts Performance in DDR SDRAM Designs
DDR FCRAM改进DDR SDRAM设计性能
12. The Design and Implementation of DDR SDRAM Controller
DDR SDRAM控制器的设计与实现
13. DDR SDRAM is a high speed and largecapacity memory,but because of the need of synchronous clock and the characteristic that it is controlled by control command,there must be a controller between the system and DDR SDRAM.
DDR SDRAM是一种大容量,高速度的同步动态存储器,但是由于其对同步性的要求以及需要由控制字来控制的特点使得他与系统之间必须有一个接口来实现时钟同步和对DDR SDRAM进行控制。
14. DDR:a Self-Adaptive,Pattern-Oriented Software Architecture
DDR:一种自适应的面向模式的软件体系结构
15. DDR architecture pattern composes of display layer,definition layer and realization layer.
DDR体系结构模式由显示层、定义层与实现层组成。
16. DDR SDRAM(Doultle Data Rate SDRAM)
DDR内存储器
17. The Design and implement of the DDR memory interface
DDR内存接口的设计与实现
18. Diagnostic value of direct digital radiography(DDR) with dual energy subtracti on in children's snoring disease caused by tonsil and adenoid vegetation
DDR双能量减影在扁桃体、腺样增殖体所致儿童鼾症诊断中的临床应用
19. Value of DDR Dual-energy Subtraction in Scapula Radiography
DDR双能量减影对肩胛骨摄片的价值
20. The Value of Standard PA Chest Image and Bone Image of Dual Energy Subtraction with DDR in Diagnostic Rib Fracture
DDR双能量减影普通胸片与骨组织像诊断肋骨骨折的价值
21. DDR memory
DDR存储器
22. DDR Memory System
DDR存储系统
23. DDR interface
DDR接口
24. So if one wants a pretty dog with a big head and nice pigment get a dog from DDR bloodlines.
DDR是否是好的工作犬，很多人搞不清楚。美国也有人挺DDR的，也有不挺的。
25. Since DDR memory in the clock rising edge and falling edge of the transmission of data can, therefore, at the same clock frequency and data-bit width memory bandwidth cases are twice as common SDRAM.
DDR显存因为能在时钟的上升沿和下降沿都能传送数据，因此，在相同的时钟频率和数据位宽度的情况下显存带宽是普通SDRAM的两倍。
26. Study on the Calibration Method of DDR Linear Array Detector
DDR线阵探测器的校正方法研究
27. DDR membrane
DDR膜
28. DDR input
DDR输入
29. DDR output
DDR输出
30. Analysis of flat-panel detector in HOLOGIC DDR system
HOLOGIC直接转换DR系统平板探测器分析
31. J-BAND SILICON DDR IMPATT DEVICE
J波段硅DDR IMPATT器件
32. X-ray imaging equipment is developing for digital equipment This article introduces some digital equipment including CR,DR DDR,CT,DSA and PACS
X线成像设备的发展是数字化。 本文介绍了一些现有数字化成像设备的原理及特点 ,包括CR、DR、DDR、CT、DSA及PACS。
33. Implementation of DDR SDRAM Controller Based on FPGA
一种DDR SDRAM控制器设计
34. Design of Virtual DDR SDRAM Used for High Speed Communications and Its Implementation with FPGA
一种用于高速通信的虚拟DDR存储器设计及其FPGA实现
35. Introduction of a direct digital radiography (DDR) system
一种直接数字化的X射线扫描成像(DR)系统
36. Don't be afraid to ask other players for advice. Most DDR players are nerdy and love helping out others to show off their amazing prowess at the game!
不要害怕去询问其他玩家的建议。大多数的DDR玩家都愿意通过帮助他人来炫耀他们在这个游戏上的令人惊异的威力。
37. Other breeding criteria that differed from West Germany was the DDR dogs could only be bred if they were completely free of HD.
与西德牧羊犬繁育标准不同的是，东德犬除非髋关节检测完全通过，否则不对其进行后代繁殖。
38. Lastly, a two-link and a three-link anthropomorphic ultrasonic motor (USM) serial DDR systems are established to investigate the feasibility.
为进一步探究各法则之可行性，本文中针对一双轴水平机械臂与一三轴空间机械臂为实验对象做验证。
39. The DDR Museum educates visitors about life in former East Berlin.
互动展馆，将告诉参观的游客过去昔日东德的生活状况。
40. Explains farther the principle and comparison of DDR and CR plate detectors.
介绍了DDR与CR平板探测器的工作原理,并对它们做进一步对比。
41. Through water-salt balances calculation, it is verified that the DDR of HSC is 1.7 times that of TDS.
从而计算并证实了有害盐量排引比约为盐量排引比的1.7倍。
42. He had an East German police dog (many DDR dogs are soft) that had over 450 street bites when it died at 10 years of age.
他有一只东德警犬（许多德牧都很温顺）有超过450的街道扑咬罪犯的记录，一直到它十岁死亡的时候。
43. Any other IP packet is considered interesting, and will therefore initiate the DDR link.
任何其他的IP封包都被当作关注的, 并将重新启动DDR连结。
44. Compared with the DDR SDRAM, DDR2 SDRAM has higher speed, lower power, higher efficiency and higher stability.
作为第2代DDR存储器的DDR2SDRAM具有高速、低功耗、高密度、高稳定性等特点,在未来的一二年里,它将逐步取代DDRSDRAM而成为内存的主流。
45. the reliance on the forecast. The new approach is called Demand Driven Replenishment (DDR......
供应链计划中的需求预测问题：不可预测，也不会去预测[2002-02-0312:08:41
46. If the outbound interface is configured for DDR, the router does a lookup to determine if the traffic is interesting.
假如拨出界面已为DDR设定好,路由器进行查阅来判断这是否是关注流量。
47. DDR II Controller Ref Voltage
内存控制器电压
48. Memory the expression of this week should be to make everybody satisfactory quite, the time of a week depreciates 25 yuan (HY256M DDR) , basic had been fall after a rise arrived on lowermost price.
内存本周的表现应该是比较让大家满意的,一周的时间就降价25元(HY256M DDR),基本已经是回落到了最低价位上。
49. The DMMU consists of address translation unit (ATU) and double data rate (DDR) memory controller.
分散式记忆体管理单元包含位址转换单元和双倍资料率记忆体控制器。
50. The common telephone line is changed to the backup line of special line using the function of Cisco router Dail-on-demand routing (DDR).
利用 CISCO路由器的按需拨号路由功能 ,我们将普通电话线制作成专线的备份线路。
51. Using FPGA to Implement DDR Memory Controller Scien?
利用FPGA实现DDR存储器控制器
52. DDR DRAMs pare down power for lap tops
削减膝上计算机功耗
53. DDR is the acronym for Double Data Rate Synchronous DRAM (SDRAM).
加，因此它的传输效能比同步动态随机存取内存(SDRAM)好。
54. dynamic device reconfiguration (DDR)
动态设备重新配置 动态设备配置
55. Computer of notebook of series of Hua Shuo L3 uses P4-M 2.2GHz CPU, 15 inches of monitor, 256M DDR memory, ATI M7 32M shows the configuration such as card.
华硕 L3系列笔记本电脑采用 P4-M 2.2GHz CPU,15英寸显示器,256M DDR 内存、ATI M7 32M 显卡等配置。
56. What was considered acceptable soldiers accomodation to a bankrupt DDR was not viewed as even baseline adequate by the Bundeswehr.
即使在垮台后的德意志民主共和国条件可以被接受的士兵住宅也没有达到联邦国防军的基准要求。
57. double data rate (DDR)
双倍数据率
58. The DDR memory controller is used in simply burst read and burst write mode.
双倍资料率记忆体控制器用于简易地爆发读取和写入模式。
59. bidirectional DDR
双向DDR传输
60. Double-data Rate Dual In-line Memory Module(DDR DIMM)
双数据率双列直插式内存模组
61. Analysis of Transit Angle of DDR IMPATT Diode
双漂移崩越二极管的渡越角分析
62. DDR SDRAM (Double Date Rate Synchronous Dynamic Random Access Memory)
双通道同步动态随机存储器(双信道同步动态随机存取内存)即
63. This is a dance pc game. play like DDR,but it have...
台湾的封测-秘密封趴结束噜 我想我会休息一阵子储蓄灵感。
64. Similarly, DDR memory bandwidth to achieve a common 2-fold of SDRAM memory.
同样，DDR显存达到的带宽也是普通SDRAM显存的2倍。
65. DDR SDRAM: Double Data Rate Synchronous Dynamic Random Access Memory.
同步双数据传输率动态随机存储器,通常简称DDR。
66. Because plastic BGA encloses the adoption with HSTL interface circuit, the clock frequency of SRAM has reached 200 megacycle per second, DDR means SRAM will at..
因塑料BGA封装与HSTL接口电路的采用，SRAM的时钟频率已经达到200兆赫，DDR方式SRAM将于...
67. In the GA module, FPGA is used to carry out the function, large volume DDR SDRAM is used to capture and store data, and Real Time Operating System(RTOS) is adopted to configure and manage test system.
在分析模块中，使用大规模可编 程逻辑芯片FPGA 来完成主要的测试功能，使用大容量存储器进行数据的捕捉存储。以及 使用实时操作系统进行系统管理配置等。
68. In the tester, using large volume DDR, buffering IP packet and delay distribution statistics with histogram are special processing technologies and methods.
在大容量存储器使用、IP 包缓冲、时延分布直方图统计等方面有创新的处理和 设计方法。
69. In the design of computer high-speed system, PSB clock is 100MHz, and DDR clock is 133 MHz.
在微机高速系统设计中,系统前端总线时钟为100MHz,DDR接口时钟为133 MHz。
70. Nach dem zweiten Weltkrieg entstanden zwei deutsche Staaten: die BRD und DDR.
在第二次世界大战后形成了两个德国：联邦德国和民主德国。
71. Based on the analysis of the SDRAM and DDR memory architecture,this paper presents the design principals of MBM and offers the implementation and the actual waveforms.
在详细分析了SDRAM和DDR存储器结构的基础上,提出了MBM的设计思想,并给出了其实现方法和实际波形。
72. Analysis and Implementation of Cisco DDR Backup for WAN Link
基于Cisco路由器的DDR线路备份技术的分析与实现
73. Realization of DDR Based on Cyclone
基于Cyclone系列芯片DDR实现
74. Timing Logical Expression Based on DDR SDRAM Controller Signals
基于DDR SDRAM控制器时序分析的模型
75. A Implementation of DDR SDRAM Controller based on FPGA
基于FPGA的DDR SDRAM控制器的实现
76. FPGA-based DDR SDRAM Controller Implementation
基于FPGA的DDR SDRAM控制器设计与实现
77. The Legend of Zelda series, Final Fantasies 1 - 9, Parasite Eve, Chrono Cross, Chrono Trigger, Legend of Mana, Legend of Dragoon, Vagrant Story, Earthbound, Super Smash Brothers, and DDR!!
塞尔达传说系列，最终幻想1 -9 ，寄生前夜，跨时空，计时触发，玛娜传奇，传奇骑兵，流浪的故事，陆栖，大乱兄弟，和D DR！
78. Add "DDR Thunderbolt center set up" expansion program can customize to load the module can have closure popular choice recommended closure of the search, security, interactive communities.
增加“DDR迅雷设置中心”扩展程序，可以自定义要加载的模块，可以有选择的关闭热门推荐，关闭搜索条、安全防护,互动社区等。
79. EL DDR Enhanced Latency DDR
增强反应周期DDR内存
80. Analysis of multi-wire proportional chamber DDR system
多丝正比室直接转换DR系统分析
